Principal Debug Validation Engineer

Stack

Responsibilities

• ▹Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator before first silicon
• ▹Deploy and debug silicon validation tests on first silicon
• ▹Develop automated test frameworks and regression test suites in Python
• ▹Collaborate closely with engineers from other disciplines
• ▹Drive best practices and continuous improvement in validation and production test methodologies
• ▹Analyse test results, identify and debug failures/defects
• ▹Contribute to shared test and validation infrastructure
• ▹Provide feedback to architects

Requirements

• ▹Understanding of ML applications and their workloads
• ▹Self-starter with independent judgement
• ▹Strong experience in bare metal / embedded C/C++
• ▹Excellent problem-solving, analytical and diagnostic skills
• ▹Experience with post-silicon validation in digital ASIC environments
• ▹Python and Linux experience
• ▹Excellent communication skills to explain complex concepts

Nice to have

• ▹5 to 10 years' experience
• ▹Experience building and leading multi-site teams
• ▹Driver-level experience with PCIe, Ethernet, memory technologies (LPDDR, DDR, HBM), or peripherals (I2C, I3C, SPI)
• ▹Knowledge of mixed-signal building blocks such as PLLs and high-speed PHYs
• ▹Experience with Arm CPUs, System IP and debug tools
• ▹Experience with AMBA protocols
• ▹Experience in characterization, failure analysis and statistical test development

Soft skills