Job Description
Scope:
Verification planning, specification, and Verification environment (creation / adaptation / maintenance)
Test case creation & execution
Requirements:
- Experience in FPGA/ASIC Top-Level Verification
- Excellent skills in SystemVerilog and UVM
- Experience in Emulation
- Strong skills in C and VHDL
- Experienced in Hardware design / systemization
- Good skills in working with UNIX and/or Linux
Good to have:
- Excellent skills in several standard interfaces, such as Ethernet, I3C, SPI, SGMII, CPRI etc
- Excellent skills in AMBA design, AXI, AHB, APB
- Formal verification
- High level synthesis
- Scripting skills using eg Python, TCL and / or Perl
- Agile
Similar jobs

Job
FPGA Verification Engineer
Anduril
Cpp
+2
$166,000–$220,000/yr
gross
🏢 On-site
Waltham
🗣️ EN

Job
Physical Design Engineer - Mixed Signal IP
Qualcomm
CppVerilog
+1
$98,500–$147,700/yr
gross
🏢 On-site
San Diego
🗣️ EN

Job
ASICS Design Verification Engineer
Qualcomm
CppVerilogVhdl
$115,600–$173,400/yr
gross
🏢 On-site
San Diego
🗣️ EN

Job
Validation Engineer
Qualcomm
AI/MLVerilogVhdl
💰 Salary: not specified
🏢 On-site
Tijuana
🗣️ EN

Job
Tech IP Library Characterization Engineer
Qualcomm
Verilog
💰 Salary: not specified
🏢 On-site
Tijuana
🗣️ EN

Job
GPU Design Verification Engineer
Qualcomm
Cpp
+2
$161,800–$273,400/yr
gross
🏢 On-site
San Diego
🗣️ EN
