Job Description
Scope:
Verification planning, specification, and Verification environment (creation / adaptation / maintenance)
Test case creation & execution
Requirements:
- Experience in FPGA/ASIC Top-Level Verification
- Excellent skills in SystemVerilog and UVM
- Experience in Emulation
- Strong skills in C and VHDL
- Experienced in Hardware design / systemization
- Good skills in working with UNIX and/or Linux
Good to have:
- Excellent skills in several standard interfaces, such as Ethernet, I3C, SPI, SGMII, CPRI etc
- Excellent skills in AMBA design, AXI, AHB, APB
- Formal verification
- High level synthesis
- Scripting skills using eg Python, TCL and / or Perl
- Agile
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