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Job
· Lead
SoC Interconnect Technology Team Lead
Other
• Lead
• On-site
• Full-time
•
San Diego, USA
This role leads the architecture, design and execution of next-generation coherent and non-coherent interconnect solutions for advanced SoCs. It requires deep expertise in scalable interconnect fabrics across mobile, battery-operated and large-scale compute systems, with a strong focus on performance, power efficiency and system-level optimization, while leading a high-performing team.
Stack
Responsibilities
- ▹Lead the architecture and development of coherent and non-coherent interconnect fabrics for complex SoCs
- ▹Define and drive system-level interconnect strategies: topology, QoS, latency, bandwidth and power optimization
- ▹Collaborate with CPU, GPU, NPU, memory and system teams to ensure integration and performance scaling
- ▹Drive adoption and implementation of industry standards (e.g., AMBA AXI/ACE/CHI)
- ▹Own performance modeling, analysis and bottleneck identification across use cases
- ▹Guide microarchitecture, RTL design and verification strategy for interconnect IP
- ▹Lead debug and root-cause analysis of complex system-level issues
- ▹Mentor and grow a team of architects and engineers
Requirements
- ▹15+ years of experience in SoC architecture/design, with a focus on interconnects or system fabrics
- ▹Proven track record of delivering large-scale SoCs (mobile, battery-powered, or high-performance compute platforms)
- ▹Deep understanding of coherent interconnect protocols (e.g., AMBA ACE, CHI, CCIX, CXL)
- ▹Strong experience with non-coherent interconnects (AXI, NoC-based fabrics)
- ▹Expertise in performance analysis, modeling and system trade-offs (latency, bandwidth, power)
- ▹Solid knowledge of cache coherency, memory hierarchy and system architecture
- ▹Experience leading cross-functional teams and driving complex projects to tape-out
Nice to have
- ▹Experience with battery-optimized SoC design (low power, DVFS, power domains)
- ▹Familiarity with AI/ML accelerators, GPUs, or heterogeneous compute systems
- ▹Exposure to network-on-chip (NoC) design methodologies and tools
- ▹Experience with silicon bring-up and post-silicon validation
- ▹Strong leadership, communication and stakeholder management skills
Soft skills
Strategic thinking with strong execution capabilityAbility to influence architecture across multiple subsystemsTrack record of mentoring and building teams
What we offer
- ▹Lead the shaping of next-generation SoC interconnect technologies
- ▹Collaborate with CPU, GPU and NPU teams on cutting-edge systems
- ▹Competitive salary
About the company
The employer designs high-volume SoC platforms for mobile and high-performance compute segments, where interconnect technology plays a key role in system performance.
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