Hardware / Software CoDesign Engineer - 3P

Stack

Responsibilities

• ▹Co-design future hardware with vendors for programmability and performance
• ▹Help hardware vendors develop optimal kernels and add compiler support for them
• ▹Develop performance estimates for critical kernels across hardware configurations, driving compute core and memory hierarchy decisions
• ▹Build system performance models at multiple abstraction levels to inform scale-up, scale-out, and front-end networking decisions
• ▹Work with ML, kernel, and compiler engineers to understand needs from high-performance accelerators
• ▹Manage communication and coordination with internal and external partners
• ▹Influence hardware partners' roadmaps to optimize for OpenAI's workloads

Requirements

• ▹4+ years of industry experience, including harnessing compute at scale and optimizing ML platform code for target hardware
• ▹Strong experience in software/hardware co-design
• ▹Deep understanding of GPUs and/or other AI accelerators
• ▹Experience with CUDA, Triton, or related accelerator programming languages
• ▹Experience driving ML accuracy with low-precision formats
• ▹Experience with system performance modeling and analysis for ML deployment optimization
• ▹Strong coding skills in C/C++ and Python
• ▹Familiarity with deep learning computing and chip architecture/microarchitecture fundamentals

Nice to have

• ▹PhD in Computer Science/Engineering specializing in Computer Architecture, Parallel Computing, or Compilers
• ▹Strong understanding of LLMs and their training/inference challenges

Soft skills

What we offer

• ▹Relocation assistance for new employees
• ▹Hybrid work model (3 days/week in office, San Francisco)

About the company

OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity, placing safety and human needs at the core of its work while attracting top talent in science, engineering, and business. This role is based in San Francisco, CA.